DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126 Issue 4
June 1999
Maintenance Object Repair Procedures
9-144ASAI-PT
9
Receive FIFO Error Counter Test (#625)
This test reads and clears the BRI port’s Rec eive FIFO error counter maintained
on the TN800 circuit pack. This counter is inc remented by the circ uit pack when it
detects an overflow of its rec eive buffers. The test passes if the value of the
counter is 0 (that is, the error is cleared). If the c ounter is not zero, the test fails,
and the value of the counter is d isplayed in the Error Code field .
This error can occur if signaling frames are being rec eived from a Packet Bus at
a rate sufficient to overflow the receive b uffers on the circuit pac k for a port or if
hardware fault is causing the rec eive buffers not to be emptied properly. This test
is useful for verifying the repair of the p roblem.
Table 9-58. TEST #624 Layer 1 Transmission Error Counter Test
Error
Code Test
Result Description/Recommendation
2000 ABORT Response was not received from the circuit pack within the allowable time
period.
1. If the test aborts repeatedly a maximum of 5 times, reset the circuit
pack using the busyout board UUCSS and reset board UUCSS
commands.
2. If the test aborts again, replace the circuit p ack.
2012 ABORT Internal system error
2100 ABORT Could not allocate necessary system resources to run test.
1. Retry the command at 1-minute intervals for a maximum of 5 times.
Any FAIL The TN800 circuit pack is still detecting errors of this type. The Error Code
field contains the value of this counter.
1. Retry the command at 1-minute intervals for a maximum of 5 times.
2. If the test continues to fail, review the results of other tests in the Long
Test Sequence. Note the results of the Level 1 S tatus Inquiry test. Follow
the repair procedures for any of the executed tests if they fail.
Otherwise, go to the next step.
3. Replace the circuit pack.
PASS The Layer 1 Transmission error counter was read correctly and has a value
of 0.
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