DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126 Issue 4
June 1999
Maintenance Object Repair Procedures
9-1346PROCR (RISC Processor Circuit Pack)
9
Processor Cache Audit test (#896) is run on d emand. However, the
processor Cache test (#895) may uncover a failure that can cause c ache
parity errors.
If no tests fail but a MAJOR alarm is present as a result of the 1026 error,
replace the Processor circu it pack since multiple c ache parity errors have
occurred in the p ast and will probably oc cur again which c an cause call
processing failures.
System Technician-Demanded T ests: Descripti ons
and Error Codes
Always investigate tests in the order p resented in the table belo w. By clearing
error codes associated with the

Processor Cache Test

, for example, you may
also clear errors generated from other tests in the testing sequence.
Processor Cache Test (#895)
This test is destructive.
This test overwrites the contents in the Instruction and Data Caches, requiring
them to be refilled during normal execution.
This test verifies that the Processor Instruction and Data Cac hes are functional.
Some errors in the caches will cause the Processor to s top functioning, while
others simply reduce p erformance by forcing instructions or data to be read from
memory more often than would normally b e necessary. In any case, cache
problems are serious and the Processor c ircuit pack must b e replaced as soon
as possible if they are detec ted.
Order of Investigation Short Test
Sequence Long Test
Sequence Reset Board
Sequence D/ND1
1. D = Destructive; ND = Nondestruc tive
Processor Cache Test (#895) X D
Processor Cache Audit (#896) X X ND
Processor BOOTPROM Checksum Test (#897) X X ND
Processor Parity Checker Test (#899) X X ND
Processor Write Buffer Test (#900) X X ND