DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126 Issue 4
June 1999
Additional Maintenance Procedures
6-12DS1 CPE Loopback Jack (T1 Only)
6
The first part of the span test powers-up the loop back jack and attemp ts to send
a simple code from the DS1 board , through the wiring and loop back jack, and
back to the DS1 board. Maintenanc e software waits about 10 second s for the
loopback jac k to loop, sends the indic ation of the test results to the management
terminal, and proceed s to the second par t of the test.
The second part of the test sends the sta ndard DS1 3-in-24 stress testing pattern
from the DS1 board, through the loopb ack jack, and bac k to a bit error detector
and counter on the DS1 board. The bit error rate c ounter may be examined at will
via the management terminal, and p rovides the results of the second part of the
test. The test remains in this state until it is terminated so that the CPE wiring may
be bit error rate tested for as long as desired.
1. Busy out the DS1 circuit pack b y entering busyout board UUCSS.
2. At the management terminal, enter change ds1
location
and verify the
near-end csu type is set to integrated.
3. Change to page 2 of the DS1 adminis tration form and confirm that the TX
LBO field is 0 (dB). If not, record the current value and chang e it to 0 dB for
testing. Press Enter to implement the ch anges or press Cancel to chang e
nothing.
4. Enter test ds1-loop
location
cpe-loopback-jack. This turns on simplex
power to the loopbac k jack and waits about 20 seconds for any active
DS1 facility alarms to clear. A “PASS” or “FAIL” displays on the terminal.
This is the first of the 2 results. A “FAIL” indicates a fault is p resent in the
wiring between the ICSU and the loop back jack. The loopb ack jack may
also be faulty. A “PASS” only indicates that the loopb ack jack looped
successfully, not that the test data con tains no errors. If a “PASS” is
obtained, continue with the following steps.
NOTE:
The loss of signal (LOS) alarm (demand test #138) is not processed
during this test while the 3-in-24 p attern is active.
5. Enter clear meas ds1 loop <location> to clear the bit error count.
6. Enter clear meas ds1 log <location> to clear the performance
measurement counts.
7. Enter clear meas ds1 esf <location> to clear the ESF error count.
8. Enter list meas ds1 sum <location> to display the bit error count. Refer
to Table 6-3 for troubleshooting information.