DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126 Issue 4
June 1999
Maintenance Object Repair Procedures
9-1584SYNC (Synchronization)
9
#148 fails with an Error Code 2 through 32, refer to the TDM-CLK
(TDM Bus Clock) Maintenance doc umentation to resolve the
problem. If not, continue with the fol lowing steps.
5. Execute the disable synchronization-switch and then the enable
synchronization-switch commands. These two commands (when
executed together) will switc h the system synchronization reference
to the primary DS1 interface circ uit pack. Check the Error Log and
execute the status synchronization command to verify that the
primary DS1 interface circuit pack is still the system
synchronization reference. If the prim ary DS1 interface circuit p ack
is not the system synchronization reference, and the master port
network does not have dupli cate Tone-Clock circuit packs, es calate
the problem. If not, continue with the following step.
6.
Duplicated Tone-Clock circuit packs in the master por t network:
Switch Tone-Clock circuit packs on the master p ort network via the
set tone-clock UUC command, and rep eat the disable/enable
commands desc ribed in the previous step .
Switch Tone-Clock circuit packs on the master p ort network via the
set tone-clock UUC command, and rep eat the disable/enable
commands desc ribed in the previous step .
b. This error indicates that Synchronization Maintenanc e has been disab led
via the disable synchronization-switch command. Execute the enable
synchronization-switch command to enable Synchronization
Maintenance reference switching and to resolve this alarm.
c. This error indicates a p roblem with the secondary DS1 reference. It will be
cleared when the second ary reference is restored. Refer to note (a) to
resolve this error substituting secondary for primary in the preced ing
resolution steps.
d. This error indicates that the Tone-Clock circuit p ack is providing the timing
source for the system. The primary and sec ondary (if administered ) are
not providing a valid timing signal. Investig ate errors 1 and 257 to resolve
this error.
e. This error indicates that the external Stratum 3 Clock fails to p rovide the
system timing reference. Refer to Stratum 3 Clock Maintenanc e document
to resolve the defective sync hronization reference.
f. This error indicates excessive swi tching of system synchroniza tion
references has occurred. When this error oc curs, synchronization is
disabled and the Tone-Clock circuit pack (in the master p ort network)
becomes the synchronization referenc e for the system. Execute the
following steps to resolve this error:
1. Check for timing loop s and resolve any loops that exist.
2. Test the active Tone-Clock circuit pack in the master po rt network
via the test tone-clock UUC long command. Check the Error Log
for TDM-CLK errors and verify that TDM Bus Clock Test #148 (TDM