DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126 Issue 4
June 1999
Maintenance Object Repair Procedures
9-1580SYNC (Synchronization)
9
Remove the transmit signal from the TN722, TN767, or TN464 circuit pack
inputs and outputs and loop it around to the receive sig nal going toward
the TN722, TN767, or TN464 circuit pack at the first unit wired to the
TN722, TN767, or TN464 circuit pack. (See Figure 9-100).
The looparound signal may take d ifferent forms depending on the
installation.
■In some cases, the unit connec ted to the system may provide a
switch or a terminal interface to control the desired looparound .
Make sure that the signal is looped toward the system and that the
timing signal is loope d.
■In most cases, it may be nec essary to temporarily rewire
connections at the cross-c onnect fields to loop the sig nal back
toward the switch.
The point at which the signal is loop ed should be one at whic h physical
access is easy and where the sig nal level is within the line compensati on
(i.e. equalization) range of the hard ware connected. A few cas es exist
where access to the looparound cannot be easily provid ed at locations
where the signal level is within the line comp ensation range of the
hardware. The line compensation can be changed via the cha nge ds1
UUCSS command.
2. Execute the test board UUCSS command for the TN722, TN767 or
TN464. Look at results of Test #144, the Slip Alarm Inquiry Test. When this
test fails, the error code giv es the number of slips detec ted since the last
Slip Inquiry Test was run. If the test fails, run it at least one more time to
ensure that slips have occurred since the looparound was insta lled.
Timing Loops
A timing loop exists whenever a system rec eives timing from another system
whose timing reference is direc tly or indirectly derived from itself. The system
synchronization planner

must avoid creating a timing loop

when administering
the synchronization references in a system. Timing loop s can lead to loss of
digital data b etween systems that are exchanging d ata with any system within
the loop. An invalid timing sig nal will also be generated b y any system within the
loop, thus propag ating the invalid timing sig nal to any system(s) using a system
within the loop as a synchronization referenc e.
A correctly desig ned network has no loops and eac h piece of equip ment in the
network is supplied b y a clock of equal or lower stra tum (i.e.,: the inputs to a
Stratum 3 clock should NEVER be from a Stratum 4 device).

Synchronization

administration changes s hould never be done without c onsulting the overall

synchronization plan for the network. If you sus pect that synchronization

administration changes are ne eded, follow normal escalation p rocedures.